Intel Says 14A Chip Defect Reduction Is Its Best Progress Since the 22nm Process, CFO Tells Investors

Intel's next-generation 14A manufacturing process is reducing chip defects faster than any node the company has developed since its highly regarded 22-nanometer technology from the early 2010s, Chief Financial Officer David Zinsner told investors this week, as the chipmaker also reported increasingly concrete interest from potential foundry customers.

Zinsner made the comments during a fireside chat with Deutsche Bank analyst Melissa Weathers at the bank's 2026 Technology Conference on Aug. 26. "When you look at the defect density, 14A is tracking better than the target curve we had for 14A," Zinsner said, according to a transcript reported by Tom's Hardware. "It is also doing better than any of the previous nodes in terms of how quickly we are bringing down the defects. In fact, we have not seen this performance since 22nm, which is arguably one of the best nodes Intel has ever put out."

Defect density refers to how many flawed structures appear on a wafer during a chip's manufacturing process, a figure that is typically high when a new node is introduced and is gradually reduced as the process matures. A lower defect density generally increases the likelihood that a completed chip functions correctly, though actual manufacturing yield also depends on additional factors including chip size, circuit design and the specific type and distribution of defects present, meaning defect density alone is not a direct stand-in for final yield.

Zinsner's comparison to Intel's 22-nanometer process, which entered mass production with the company's Ivy Bridge chips in the early 2010s and is widely regarded as one of Intel's most successful manufacturing nodes, was based specifically on the speed of defect reduction at a similar point in each node's development timeline, roughly two years before planned mass production, rather than a claim that 14A has already matched 22-nanometer's absolute defect levels. Some industry analysts have also noted that improvements in wafer inspection equipment over the past decade and a half have changed how defects are measured and detected, adding another layer of nuance to any direct historical comparison.

Intel 14A represents the company's next major advance beyond its current 18A node, retaining the fundamental shift to gate-all-around transistors and backside power delivery that Intel introduced with 18A while further refining both technologies. The new node introduces RibbonFET 2, the second generation of Intel's gate-all-around transistor architecture, along with PowerDirect, an advancement of the PowerVia backside power delivery concept that routes power through the back of the wafer rather than alongside signal lines on the front. According to Intel's own published targets, 14A is expected to deliver 15% to 20% more performance at the same power consumption compared with 18A, or alternatively 25% to 35% lower power consumption at equivalent performance, along with up to 30% higher transistor density. Those figures represent Intel's internal development targets rather than measurements from finished, volume-production chips.

Beyond the defect data, Zinsner said discussions with potential external foundry customers for 14A have shifted meaningfully in tone over recent months. "We are now seeing demand from our internal customers on 14A [and] they are actually probably the most cynical bunch out of anybody," Zinsner said, according to Tom's Hardware's reporting. "The fact that they are now designing products on 14A was a good confidence boost for us as well. Then, engagements with customers externally, from a foundry perspective has significantly increased." He added that Intel Chief Executive Lip-Bu Tan and other company leaders are now meeting with potential customers on a weekly basis, and that those conversations have moved past reviewing technical performance data toward more concrete questions about available manufacturing capacity and supply timelines.

Intel's 0.9 process design kit for 14A, a set of tools external and internal chip designers use to build products for the node, is expected to be released in October, according to a summary of the conference published by Investing.com. The company has said risk production, an early manufacturing phase used to validate a process before full-scale output, is planned for 2027, with high-volume manufacturing targeted for 2028.

Despite the more positive tone surrounding 14A's technical progress, Intel has not yet announced a major, binding external customer contract for the node, a milestone the company has previously described as critical to its long-term foundry strategy. Intel disclosed in its 2025 annual report that it might need to pause or discontinue development of 14A and subsequent processes if it could not secure a significant external customer commitment, given the substantial capital costs associated with operating leading-edge manufacturing nodes. By the company's second-quarter 2026 report, that language had softened somewhat, with Intel committing to complete 14A development while citing progress on technical milestones relevant to prospective large customers.

Zinsner's remarks came alongside a broader set of updates on Intel's finances and manufacturing strategy. The company raised its 2026 capital expenditure guidance to 20 billion dollars from a previous range of 18 billion to 20 billion dollars, following a roughly 23 billion dollar equity offering. Intel also said its existing 18A process is yielding ahead of internal targets and detailed plans to expand manufacturing capacity across multiple facilities, including more than doubling output at its Fab 52 site in Ireland next year and accelerating work at its Fab 62 facility in Arizona.